National Semiconductor 54S112DM
| Parameters | |
|---|---|
| HTSUS | 8542.39.0001 |
| Standard Package | 1 |
| Mfr | National Semiconductor |
| Series | 54S |
| Package | Bulk |
| Product Status | Active |
| Function | Set(Preset) and Reset |
| Type | JK Type |
| Output Type | Complementary |
| Number of Elements | 2 |
| Number of Bits per Element | 1 |
| Clock Frequency | 60 MHz |
| Max Propagation Delay @ V, Max CL | 12ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| Current - Output High, Low | 1mA, 20mA |
| Voltage - Supply | 4.5V ~ 5.5V |
| Current - Quiescent (Iq) | 50 mA |
| Operating Temperature | -55°C ~ 125°C (TA) |
| Mounting Type | Through Hole |
| Supplier Device Package | 16-CDIP |
| Package / Case | 16-CDIP (0.300", 7.62mm) |
| Base Product Number | 54S112 |
| RoHS Status | RoHS non-compliant |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| REACH Status | Vendor Undefined |
| ECCN | EAR99 |
Flip Flop 2 Element JK Type 1 Bit Negative Edge 16-CDIP (0.300", 7.62mm)
